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JW
Posted: Fri Jan 19, 2007 7:37 am
Guest
On Thu, 18 Jan 2007 10:30:42 -0700 Jim Thompson
<To-Email-Use-The-Envelope-Icon@My-Web-Site.com> wrote in Message id:
<jibvq29uje26sor1jcjtoloeknilv348o3@4ax.com>:

Quote:
I don't remember that one. But I do remember the Order of Siam in Boy
Scouts...

Oh
Wa
Ta
Goo
Siam

I remember that one from an old Odd Couple episode.
CWatters
Posted: Fri Jan 19, 2007 12:09 pm
Guest
"petrus bitbyter" <pieterkraltlaatditweg@enditookhccnet.nl> wrote in message
news:45b00e55$0$16517$847b8a76@dreader15...
Quote:
What have you done yourself before asking here? A lot of circuits
introduce
jitter in a lot a signals and PLL is one of them. What circuit are you
talking about? Some years ago Electronics World had an article on reducing
jitter in signals. Being an electrical engineering student you should be
able to find this (and a lot more).

and the OP hasn't really explained the origin of the jitter. Could be lots
of ways of reducing it at source.
vasile
Posted: Sat Jan 20, 2007 1:50 pm
Guest
Simon wrote:
Quote:
Hi,

I am an electrical engineering student and I am interested in circuit
design. Unfortunety I am not so familiar with analog design. Therefore I
want to place my question here in the newsgroup:

Is there a method to reduce jitter without the use of PLL? Where can I find
sophisticated circuits for this?

Simon,
Your question should also explain a few more thigs:
1. which is the amplitude, the frequency and the shape of the signal
having this jitter
2. at least which is the magnitude order of your requested jitter
3. which is the circuit topology which is carrying this signal (IQ,
bipolar, unipolar etc)

PLL in 90% of the situations are adding a bigger jitter than a clean
low noise oscillator output may have.
Any sophysticated circuit has a limited chance to work opposed to a
simple circuit.
Remember one thing when you'll become engineer and you'll have a lot of
employeers on your hand: keep things simple in your design and in your
relations with other people.

greetings,
Vasile
 
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