| |
|
Science Forum Index » Electronics - Design Forum » Dielectric biasing question...
Page 1 of 1
|
| Author |
Message |
| ... |
 Posted: Tue Jun 17, 2008 3:22 pm |
|
|
|
Guest
|
I have a differential pair used for high speed digital stuff. It needs
to be ac coupled to the receiver.
The signals can be on some common-mode voltage on the order of 0 to
+3V.
The question is where to put the ac coupling caps? Near where the
signal enters the board, or near the chip's inputs?
Does the DC level bias adversely affect the high frequency performance
(loss) of the material underneath the traces? I suppose at 3KV there
might be something but at 3v?
Anyone? John? |
|
|
| Back to top |
|
| |
|
Page 1 of 1
All times are GMT - 5 Hours
The time now is Sat Nov 22, 2008 11:32 am
|
|
