At the moment, the IEEE is voting on a revision to IEEE 754, which
will include a standard for decimal floating-point.

The new decimal floating-point standard includes an interesting and
novel feature, a set of "ideal exponent" rules.

You may be familiar with how unnormalized floating-point arithmetic
can be used to implement significance arithmetic. While this decimal
floating-point standard also provides for unnormalized representations
of numeric values, the ideal exponent rules are NOT those of
significance arithmetic.

Instead, the operands of an arithmetic operation are assumed to be
exact, so that digits beyond those represented are known to be zero,
but the ideal exponent rules attempt to avoid representing unnecessary
trailing zeroes. So, for example, in an addition, the least
significant digit of the sum corresponds, if possible, to the least
significant digit with the _lower_, rather than the higher, value of
those of the two operands.

The goal is a sort of humanized arithmetic. The same rules of the IEEE
754 binary standard for obtaining the most exact result possible are
still in effect - guard, round, and sticky.

It has been noted that even under such a condition, a floating-point
representation with an exponent based on a radix of 10 instead of a
radix of 2 can have some bad properties. For example, if there are
four digits of precision, .9999 plus .9999 is 1.9998, which is closer
to 2 than to 1.999. This particular problem is avoided in any radix
less than four.

On my web page at

http://www.quadibloc.com/comp/co020302.htm

I describe this new floating-point format. Then I go on to show that,
if these numerical faults are a concern, one can modify it somewhat -
giving up the ability to have unnormalized values (except for gradual
underflow for the lowest exponent value) - to have a distribution of
representable points that one would find for a radix (2, 2.5, 2)
notation.

I do this by representing the first digit *and* a last digit appended
to the end of the main decimal "mantissa" by a single four-bit code.
The first digit 1 gets eight codes, the appended digit can be 0, 2, 4,
6, or 8. The first digits 2, 3, and 4 get two codes each, the appended
digit can be 0 or 5. The first digits 5 through 9 only get one code,
and only 0 is appended.

I don't really think such a format is *terribly* useful. It doesn't do
anything that binary IEEE 754 doesn't *already* do, except for
representing some decimal values exactly, but it does illustrate that
decimal floating-point doesn't *have* to have certain objectionable
numerical properties.

I then go on to show that this basic principle can be used for a sort
of "quasilogarithmic" floating-point. Here, I imitate the distribution
of representable values of an alternating radix notation with radices

1.25, 1.28, 1.25, 1.25, 1.25, 1.25, 1.25, 1.25, 1.28, 1.25

in a cycle - thus, in effect, the radix point advances by *one-third
of a bit* at a step. (I note that a more insanely extreme application
of this principle, to sexagesimal instead of decimal floating-point,
could make the step about 1/53rd of a bit instead.)

Is there any potential benefit to be derived from a scheme of this
sort?

John Savard

On 26 Mar 2007 04:53:48 -0700, "Quadibloc" <jsavard@ecn.ab.ca> wrote:

At the moment, the IEEE is voting on a revision to IEEE 754, which
will include a standard for decimal floating-point.

Would you happen to have a URL for the new standard?

On my web page at
http://www.quadibloc.com/comp/co020302.htm

It came up not found.

Richard Harter wrote:

It came up not found.

Maybe it is:
http://www.quadibloc.com/comp/cp020302.htm