| |
 |
|
| Linux Forum Index » Linux Development - System » thread memory size... |
|
Page 3 of 4 Goto page Previous 1, 2, 3, 4 Next |
|
| Author |
Message |
| David Schwartz... |
Posted: Thu Oct 08, 2009 11:04 pm |
|
|
|
Guest
|
On Oct 9, 12:11 am, Jan Helgesen <s... at (no spam) nospam.com> wrote:
Quote: The benefit is simple -- you don't have to share memory. And that is
the *only* benefit to prohibiting the use of other synchronization
mechanisms.
Exactly
So why are you asking about threads which do have to share memory?
Quote: and that is the one benefit I am talking about. It allows
massive parallelisation of code, which is an enourmous benefit. That
benefit can be utilised when computers move to more and more cores per
processors, instead of the old game that was about more and more
kilo/mega/giga hertz.
Yes, if and only if you *don't* use shared memory. So why are you
asking about threads?
DS |
|
|
| Back to top |
|
|
|
| Jan Helgesen... |
Posted: Thu Oct 08, 2009 11:48 pm |
|
|
|
Guest
|
David Schwartz wrote:
Quote: It would help if you showed some indication that you understood what I
was saying.
I think you need to take a class about Computer architectures and one
about assembler programming or advanced programming, that will explain
to you why you are wrong.
regards
Jan |
|
|
| Back to top |
|
|
|
| Jan Helgesen... |
Posted: Fri Oct 09, 2009 12:10 am |
|
|
|
Guest
|
David Schwartz wrote:
Actually, after reading it agains I see where your misunderstanding is.
Quote: This is a serious misunderstanding on your part. They *do* need to
share it and lock it. The reason for the message passing is precisely
to allow the threads to easily share and lock data.
I was not not talking about message passing, I was just talking about
threads that share the same memory address space.
If there is a message passing mechanism involved then mostly yes. In
many implementation there would need to be some synchronisation within
the message passing implementation.
Mind you, there are such concurrency structures that can be implemented
without locks, they are called lock-free implementations and are usually
based on state machines.
But, the program is not required to focus on that any more, because its
all in the library instead of in the program code.
And that is my entire point, that when one uses a simple mechanism as
message passing, synchronisation is left to the library, not the
program. The program code does not need to worry about it, since data is
not shared by the programs threads, but just by the messaging library
for a brief nanosecond, once. That's quite a simple model.
So this reduced concurrency control requirement is dependent on two new
aspects. Letting the message passing library deal with it the
concurrency, since it is easy to test and verify. And structuring the
program differently so that it utilises message passing and enables
massive parallelism instead of the sequential programming model of today.
regards
Jan |
|
|
| Back to top |
|
|
|
| David Schwartz... |
Posted: Fri Oct 09, 2009 11:08 am |
|
|
|
Guest
|
On Oct 9, 2:03 am, David Schwartz <dav... at (no spam) webmaster.com> wrote:
Quote: But I appreciate your attempt at catching me in a minor "gotcha" so as
to waste time and avoid the major issues.
I apologize for this comment. It was unwarranted.
DS |
|
|
| Back to top |
|
|
|
| Jan Helgesen... |
Posted: Sat Oct 10, 2009 2:34 am |
|
|
|
Guest
|
David Schwartz wrote:
Quote: On Oct 9, 2:03 am, David Schwartz <dav... at (no spam) webmaster.com> wrote:
But I appreciate your attempt at catching me in a minor "gotcha" so as
to waste time and avoid the major issues.
I apologize for this comment. It was unwarranted.
Apology accepted.
regards
Jan |
|
|
| Back to top |
|
|
|
| Jan Helgesen... |
Posted: Sat Oct 10, 2009 2:35 am |
|
|
|
Guest
|
David Schwartz wrote:
Quote: On Oct 9, 12:11 am, Jan Helgesen <s... at (no spam) nospam.com> wrote:
The benefit is simple -- you don't have to share memory. And that is
the *only* benefit to prohibiting the use of other synchronization
mechanisms.
Exactly :)
So why are you asking about threads which do have to share memory?
Sorry but that's not the paragraph i intended to comment on. I forgot to
remove the latter part of that paragraph
Let me re-comment it again:
-------
Quote: That is a *cost* that only makes sense to pay if there's some
corresponding *benefit*.
Exactly and that is the one benefit I am talking about. It allows
massive parallelisation of code, which is an enormous benefit. That
benefit can be utilised when computers move to more and more cores per
processors, instead of the old game that was about more and more
kilo/mega/giga hertz.
---------
But as I said we are off track in this discussion, please see my other
post to you, which should help us focus the discussion on the real
matter again.
regards
Jan |
|
|
| Back to top |
|
|
|
| David Schwartz... |
Posted: Sun Oct 11, 2009 9:55 pm |
|
|
|
Guest
|
On Oct 11, 9:22 pm, David Schwartz <dav... at (no spam) webmaster.com> wrote:
Quote: Now imagine we switch collections A and B to a lock-free algorithm.
Now, there's a 50 percent chance that one thread will be A1 or A2 and
the other will be B1 or B2. In this case, there will be frequent
contention and the shared collection will constantly ping-pong from
cache to cache. FOR NO REASON.
Grr. Of course, this should read "that one thread will be A1 and the
other will be A2, or one thread will be B1 and the other will be B2".
In either case, for no reason at all, two threads are horribly
contending and saturating the FSB. Worse, if you have more than two
cores running threads from other processes, those threads can't make
decent forward progress because the FSB is saturated.
(My terminology assumes there *is* an FSB. But the issues are similar,
though not always precisely the same or as bad, if you have some other
technology.)
DS |
|
|
| Back to top |
|
|
|
| David Schwartz... |
Posted: Sun Oct 11, 2009 11:34 pm |
|
|
|
Guest
|
On Oct 12, 2:27 am, Jan Helgesen <s... at (no spam) nospam.com> wrote:
Quote: It is with these advances in technology, I base my arguments. Since the
people working on these algorithms are acknowledged experts on the
matter of concurrency, I trust them a bit more than your unsupported
claims. Since you have not been able to convince me with your arguments,
nor have you been able to produce any references that supports your
claim, I have little incentive to agree with you.
I cannot convince you with my arguments because you are beyond
rational persuasion. I notice that you don't point out any errors or
flaws of any kind, you simply point to something completely irrelevant
and claim that it somehow refutes my argument when, ironically, it
actually supports it.
In any event, continue doing what you're doing having no understanding
of any of the concepts involved. I have exhausted my patience trying
to educate you.
DS |
|
|
| Back to top |
|
|
|
| David Schwartz... |
Posted: Mon Oct 12, 2009 1:22 am |
|
|
|
Guest
|
On Oct 12, 3:09 am, Jan Helgesen <s... at (no spam) nospam.com> wrote:
Quote: you have seen one of my references, maybe you could explain why you
think that is irrelevant.
That it is possible to do something right does not refute an argument
that it is possible to do something wrong. If you look at my last
paragraph of the post you didn't respond to, I explained that.
But this is a waste of time. You actively refuse to think and I'm
through trying. (I see no evidence you even attempted to understand my
argument.)
DS |
|
|
| Back to top |
|
|
|
| David Schwartz... |
Posted: Mon Oct 12, 2009 2:37 am |
|
|
|
Guest
|
On Oct 12, 5:17 am, Jan Helgesen <s... at (no spam) nospam.com> wrote:
Quote: David Schwartz wrote:
On Oct 12, 3:09 am, Jan Helgesen <s... at (no spam) nospam.com> wrote:
you have seen one of my references, maybe you could explain why you
think that is irrelevant.
That it is possible to do something right does not refute an argument
that it is possible to do something wrong. If you look at my last
paragraph of the post you didn't respond to, I explained that.
So your argument is: just because it is possible that something can go
wrong with anything, nothing is worth looking at? That's the most silly
rationale I have ever heard. The reference I showed you, shows that it
is possible to do it with 750 cpus. I have never claimed it works for 1
million cores yet, I have said that the future might be bright.
I don't understand how you got that from what I said.
Quote: But this is a waste of time. You actively refuse to think and I'm
through trying. (I see no evidence you even attempted to understand my
argument.)
Arrgh, wtf is wrong with you. I have answered all your questions or
arguments that I find relevant. I have tried as hard as I can understand
how you get to your conclusions and how it is related to the case. But
every time I ask you to explain, you just change the examples you use or
the focus of your arguments, it is impossible to keep track of how all
your arguments are related and how it is relevant.
Your only response is to say generic and silly statements like "you show
no evidence... " or "you do not understand what I say.." and so on
without explaining explicitly what it is in my arguments you think are
are wrong.
You don't make arguments. You just say that I'm wrong and then cite
things that are either irrelevant or that actually agree with me Can
you show some sign, any sign, that you understood my example about the
lock-free collections, the four threads, and the two cores?
DS |
|
|
| Back to top |
|
|
|
| David Schwartz... |
Posted: Mon Oct 12, 2009 2:46 am |
|
|
|
Guest
|
On Oct 12, 5:37 am, David Schwartz <dav... at (no spam) webmaster.com> wrote:
Quote: You don't make arguments. You just say that I'm wrong and then cite
things that are either irrelevant or that actually agree with me. Can
you show some sign, any sign, that you understood my example about the
lock-free collections, the four threads, and the two cores?
From my end, it looked like you just thought "he said lock-free
doesn't work or doesn't scale, but here's a reference that shows that
it does". Is that what you were thinking? If so, you *completely*
missed my argument.
DS |
|
|
| Back to top |
|
|
|
| Jan Helgesen... |
Posted: Mon Oct 12, 2009 4:09 am |
|
|
|
Guest
|
David Schwartz wrote:
Quote: On Oct 12, 2:27 am, Jan Helgesen <s... at (no spam) nospam.com> wrote:
It is with these advances in technology, I base my arguments. Since the
people working on these algorithms are acknowledged experts on the
matter of concurrency, I trust them a bit more than your unsupported
claims. Since you have not been able to convince me with your arguments,
nor have you been able to produce any references that supports your
claim, I have little incentive to agree with you.
I cannot convince you with my arguments because you are beyond
rational persuasion. I notice that you don't point out any errors or
flaws of any kind, you simply point to something completely irrelevant
and claim that it somehow refutes my argument when, ironically, it
actually supports it.
I am not doing anything different from what you are doing. I am removing
your arguments that that are irrelevant to my point.
you have seen one of my references, maybe you could explain why you
think that is irrelevant.
regards
Jan
Quote:
In any event, continue doing what you're doing having no understanding
of any of the concepts involved. I have exhausted my patience trying
to educate you.
DS |
|
|
| Back to top |
|
|
|
| Jan Helgesen... |
Posted: Mon Oct 12, 2009 6:17 am |
|
|
|
Guest
|
David Schwartz wrote:
Quote: On Oct 12, 3:09 am, Jan Helgesen <s... at (no spam) nospam.com> wrote:
you have seen one of my references, maybe you could explain why you
think that is irrelevant.
That it is possible to do something right does not refute an argument
that it is possible to do something wrong. If you look at my last
paragraph of the post you didn't respond to, I explained that.
So your argument is: just because it is possible that something can go
wrong with anything, nothing is worth looking at? That's the most silly
rationale I have ever heard. The reference I showed you, shows that it
is possible to do it with 750 cpus. I have never claimed it works for 1
million cores yet, I have said that the future might be bright.
Quote: But this is a waste of time. You actively refuse to think and I'm
through trying. (I see no evidence you even attempted to understand my
argument.)
Arrgh, wtf is wrong with you. I have answered all your questions or
arguments that I find relevant. I have tried as hard as I can understand
how you get to your conclusions and how it is related to the case. But
every time I ask you to explain, you just change the examples you use or
the focus of your arguments, it is impossible to keep track of how all
your arguments are related and how it is relevant.
Your only response is to say generic and silly statements like "you show
no evidence... " or "you do not understand what I say.." and so on
without explaining explicitly what it is in my arguments you think are
are wrong.
regards
Jan |
|
|
| Back to top |
|
|
|
| Jan Helgesen... |
Posted: Mon Oct 12, 2009 6:26 am |
|
|
|
Guest
|
David Schwartz wrote:
Quote: On Oct 11, 9:22 pm, David Schwartz <dav... at (no spam) webmaster.com> wrote:
Now imagine we switch collections A and B to a lock-free algorithm.
Now, there's a 50 percent chance that one thread will be A1 or A2 and
the other will be B1 or B2. In this case, there will be frequent
contention and the shared collection will constantly ping-pong from
cache to cache. FOR NO REASON.
Grr. Of course, this should read "that one thread will be A1 and the
other will be A2, or one thread will be B1 and the other will be B2".
In either case, for no reason at all, two threads are horribly
contending and saturating the FSB. Worse, if you have more than two
cores running threads from other processes, those threads can't make
decent forward progress because the FSB is saturated.
(My terminology assumes there *is* an FSB. But the issues are similar,
though not always precisely the same or as bad, if you have some other
technology.)
You mentioned T2, but it has only 8 cores in one chip, and uses a
traditional chip layout. The Tilera Tile64 chip uses a tile
architecture, which means that all cores are connected to 4 other cores
by way of 4 super fast switches (one per core). So there are 64 switches
and 64 cores, which are each connected to a number of ram controllers.
This will give different concurrency possibilities than an ordinary FSB. See
http://en.wikipedia.org/wiki/File:Tile64.svg
regards
Jan |
|
|
| Back to top |
|
|
|
| Jan Helgesen... |
Posted: Mon Oct 12, 2009 8:16 am |
|
|
|
Guest
|
David Schwartz wrote:
Quote: You don't make arguments. You just say that I'm wrong and then cite
things that are either irrelevant or that actually agree with me Can
you show some sign, any sign, that you understood my example about the
lock-free collections, the four threads, and the two cores?
Ok, here is my game plan. I will refrain from arguing anything until we
both agree that I about what the example
understand the example you gave, ok?
If you are talking about the example about threads A1, A2, B1, B2, I
will continue from that thread, ok?
regards
Jan |
|
|
| Back to top |
|
|
|
|
|
All times are GMT - 5 Hours
The time now is Mon Nov 23, 2009 5:24 pm
|
|