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Posted: Wed Apr 15, 2009 12:08 am |
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Guest
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I want to use following function to implement atomic exchange
operation,
t <- *lock; //store *lock into temp variable t
a -> *lock; // store input param a into *lock
return t; // return t
after objdump the object file, I was confused by the disassembler
code.
source code and disassembler code are listed following:
//source code
static int atomic_lock(int a, int* lock)
{
int t;
__asm__ __volatile__(
"1: lwarx %0,0,%2 \n\
stwcx. %3,0,%2 \n\
bne- 1b"
: "=&r" (t), "=m" (*lock)
: "r" (lock),"r" (a), "m" (*lock)
: "cc", "memory");
return t;
}
//disassembler code by objdump
00003884 <_Z11atomic_lockiPi>:
_Z11atomic_lockiPi():
3884: 94 21 ff e0 stwu r1,-32(r1)
3888: 7c 00 20 28 lwarx r0,r0,r4
388c: 7c 60 21 2d stwcx. r3,r0,r4
3890: 40 a2 ff f8 bne- 3888 <_Z11atomic_lockiPi+0x4>
3894: 7c 03 03 78 mr r3,r0
3898: 38 21 00 20 addi r1,r1,32
389c: 4e 80 00 20 blr
In line-388c of disassembler code,
stwcx. r3,r0,r4
r0 is not zero, because r0 was modified at line-3338 "lwarx
r0,r0,r4",
and value of *lock is stored into r0.
so in line-388c "stwcx. r3,r0,r4" , this statement will store r3
into (r0)+(r4),
it does not the expected address: 0+(r4)
Is that right? |
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| Paul Russell... |
Posted: Wed Apr 15, 2009 6:10 am |
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Guest
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huzd at (no spam) hotmail.com wrote:
Quote: I want to use following function to implement atomic exchange
operation,
t <- *lock; //store *lock into temp variable t
a -> *lock; // store input param a into *lock
return t; // return t
after objdump the object file, I was confused by the disassembler
code.
source code and disassembler code are listed following:
//source code
static int atomic_lock(int a, int* lock)
{
int t;
__asm__ __volatile__(
"1: lwarx %0,0,%2 \n\
stwcx. %3,0,%2 \n\
bne- 1b"
: "=&r" (t), "=m" (*lock)
: "r" (lock),"r" (a), "m" (*lock)
: "cc", "memory");
return t;
}
//disassembler code by objdump
00003884 <_Z11atomic_lockiPi>:
_Z11atomic_lockiPi():
3884: 94 21 ff e0 stwu r1,-32(r1)
3888: 7c 00 20 28 lwarx r0,r0,r4
388c: 7c 60 21 2d stwcx. r3,r0,r4
3890: 40 a2 ff f8 bne- 3888 <_Z11atomic_lockiPi+0x4
3894: 7c 03 03 78 mr r3,r0
3898: 38 21 00 20 addi r1,r1,32
389c: 4e 80 00 20 blr
In line-388c of disassembler code,
stwcx. r3,r0,r4
r0 is not zero, because r0 was modified at line-3338 "lwarx
r0,r0,r4",
and value of *lock is stored into r0.
so in line-388c "stwcx. r3,r0,r4" , this statement will store r3
into (r0)+(r4),
it does not the expected address: 0+(r4)
Is that right?
In most PowerPC instructions that take an offset, R0 is special and
means 0 rather than R0 itself. It would be helpful if the disassembler
you're using took this into account, but it looks like the generated
code will do what you expect it to.
Paul |
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