Main Page | Report this Page
Computers Forum Index  »  Computer Architecture - FPGA  »  Conversion to RTL...
Page 1 of 1    

Conversion to RTL...

Author Message
RSGUPTA...
Posted: Mon Nov 02, 2009 10:34 am
Guest
Hi,
I was wonderring what this template of SystemC code would be, if
written in RTL for Synthesis:
********* Code Snippet 1 ***********
if (condition 1 == true) {
rd_ptr++;
status = "001";
}
else {
wait();
}

*********************************
********* Code Snippet 2 ***********
if (condition 1 == true) {
rd_ptr++;
while (a== false){
wait();
}
}
else {
wait();
}

*********************************
Both the process are sensitive to clk
 
 
Page 1 of 1    
All times are GMT
The time now is Wed Dec 02, 2009 7:48 am