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nanosim help...
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bearsarebears...
Posted: Wed Dec 17, 2008 12:27 pm
Guest
Hi all,

I wish to do a nanosim fast spice simulation.

I am confused about how to do this.
I have the SPEF file, .mod file, the gate-level verilog netlist and a
test-bench.

Is it possible to use the test-bench directly or must I generate
a .vcd file and then convert the .vcd file to .vec file with the
vcd2vec command?

How do i set my power supply voltage etc?

Please help, I am totally lost!
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