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MasPar complier and simulator...

Author Message
Mark Brehob...
Posted: Sun Oct 11, 2009 2:22 pm
Guest
Hello all,
Back in the day ('94?) I did a fair bit of work on the MasPar. My
plan was to do my PhD on massive SIMD machines. Well, parallel
computer systems went out of vogue and it looked like getting work on
that published would be nearly impossible. So I jumped over to memory
systems.

In any case, I'm wondering if anyone has a copy of the MasPar
compliers (MPL, MasPar Fortran, etc.) and simulator. I have found a
copy of the MPL programming guide. But all links I could find to
compilers were dead.

A bunch of students are going to be picking parallel computer projects
for a parallel architecture class and I'd love to get some of them to
revisit the massive SIMD arena. I have a dream of getting students to
actually design (and maybe get built) a massive SIMD chip...

Of course, if anyone knows of better massive SIMD compliers/simulators
that would be great too!

(I've also posted to comp.parallel but later realized the moderator is
getting spammed to death and won't be moderating posts for a while so
I thought I'd post here too...).

Thanks,
Mark
 
Mark Brehob...
Posted: Sun Oct 11, 2009 6:04 pm
Guest
On Oct 11, 10:35 am, j... at (no spam) cix.compulink.co.uk wrote:
Quote:
In article
8087b0d0-6936-4f72-8ba1-f209cd7f9... at (no spam) v25g2000yqk.googlegroups.com>,

bre... at (no spam) gmail.com (Mark Brehob) wrote:
A bunch of students are going to be picking parallel computer projects
for a parallel architecture class and I'd love to get some of them to
revisit the massive SIMD arena.

Point them at GPGPUs, especially OpenCL. You may find your wheel has
been reinvented, but this time round it is becoming genuinely useful for
some things.

--
John Dallman, j... at (no spam) cix.co.uk, HTML mail is treated as probable spam.

I'm not much up on the current state of the GPGPU tools, but my actual
thought is to try to get them to understand a programming/hardware
model that was designed for general SIMD work rather than one that was
hacked for it. Put differently, the MasPar model is more general and
frankly a lot cleaner. I'd like them to learn it and then hopefully
consider how to either change the hardware or software of the GPU to
make that programming model viable. Perhaps the latest round of tools
has gotten us there already. They hadn't a year or so ago.

Or, even better, have the GPU replaced with something more MasPar-
like. Power likely prevents that in the short term, but... It still
makes a potentially interesting class project...

Thanks!

Mark
 
...
Posted: Sun Oct 11, 2009 6:35 pm
Guest
In article
<8087b0d0-6936-4f72-8ba1-f209cd7f9aa2 at (no spam) v25g2000yqk.googlegroups.com>,
brehob at (no spam) gmail.com (Mark Brehob) wrote:

Quote:
A bunch of students are going to be picking parallel computer projects
for a parallel architecture class and I'd love to get some of them to
revisit the massive SIMD arena.

Point them at GPGPUs, especially OpenCL. You may find your wheel has
been reinvented, but this time round it is becoming genuinely useful for
some things.

--
John Dallman, jgd at (no spam) cix.co.uk, HTML mail is treated as probable spam.
 
Andy \"Krazy\" Glew...
Posted: Sun Oct 11, 2009 11:25 pm
Guest
Mark Brehob wrote:
Quote:
[original post]:
Back in the day ('94?) I did a fair bit of work on the MasPar. My
plan was to do my PhD on massive SIMD machines. ...

... I have found a copy of the MPL programming guide. ...

[in a subsequent post]:
I'm not much up on the current state of the GPGPU tools, but my actual
thought is to try to get them to understand a programming/hardware
model that was designed for general SIMD work rather than one that was
hacked for it. Put differently, the MasPar model is more general and
frankly a lot cleaner. I'd like them to learn it and then hopefully
consider how to either change the hardware or software of the GPU to
make that programming model viable. Perhaps the latest round of tools
has gotten us there already. They hadn't a year or so ago.

Or, even better, have the GPU replaced with something more MasPar-
like. Power likely prevents that in the short term, but... It still
makes a potentially interesting class project...


Mark:

Ever since I realized that the Nvidia SIMT (Single Instruction Multiple
Threading) model is not just massive SIMD, but is something I have not
seen before, I have wondered where it came from.

It is probably not specific to Nvidia, since it cropped up, in slightly
different flavors, in all the GPUs at about the same time (2003?):
Nvidia's SIMT(scalar), ATI's SIMT(VLIW), Intel's integrated graphics.
(Because it cropped up in so many different flavors, and because it is
obviously not just S-single, I've been trying out names such as NIMT (N
instructions, M threads) or, my current preference, CT (Coherent Threading).

Because it cropped up in so many places at around the same time, it
seems likely that it was invented at some earlier company, that failed,
and whose refugees brought it to the GPU community. MasPar seems like a
likely candidate, but I have not seen any good evidence. The published
papers I have seen on MasPar seem more primitive than GPU SIMT, but who
knows what was unpublished.

I must admit that, when MasPar came out, I was one of those who said
"Massive SIMD, ho-hum, boring, I've seen it before." But if MasPar
truly is where SIMT/CT arose, well, I want to give credit where credit
is due.

And if MasPar was more advanced and general purpose than a reasonable
extrapolation of the GPU programming model, well, I'd love to see that too.

I'd love to read a copy of the MPL programming guide, if you are allowed
to share it.

Is there anything you are allowed to share?
 
Mark Brehob...
Posted: Mon Oct 12, 2009 1:04 am
Guest
On Oct 11, 6:25 pm, "Andy \"Krazy\" Glew" <ag-n... at (no spam) patten-glew.net>
wrote:
Quote:
Andy "Krazy" Glew wrote:
I must admit that, when MasPar came out, I was one of those who said
"Massive SIMD, ho-hum, boring, I've seen it before."   But if MasPar
truly is where SIMT/CT arose, well, I want to give credit where credit
is due.

I am afraid that spending some time googling MasPar this afternoon has
not changed my mind: what I can find seems to indicate that MasPar was a
fairly uninspiring SIMD machine, rather like the MPP, or the Thinking
Machines TM-1.

This does not answer the question "Where did SIMT come from?"

(first sent as an e-mail as I didn't realize you'd responded here as
well)

Hi Andy,
Good to hear from you!

I'm not real familiar with the SIMT programming model, but from what
I've seen it sounds a lot like the old SPMD (P=Program) that the
MasPar used. You wrote the program as a single program with each data
element either local to the processing element or local to the main
controller. Then it executed like a single warp, doing ifs and the
like serially. (Although I vaguely recall that you could have up to 4
different instruction paths in flight at the same time on the MasPar2
much like having multiple Warps but more flexible).

No idea if it's novel or not, but I like just writing standard C code
other than having two types of memories (which plays havoc with
pointers, but other otherwise okay). One for the "main" machine (a
VAX in this case) and one for the array of PEs (used the "plural"
keyword when declaring). So X=X+Y where X was in the PE array and Y
was in the main machine caused each PE to add the same value (Y) to
it's local version of X. With pointers you could do all sorts of
crazy SIMD things that were similar to MIMD but without the
programming pain. Add in the ability to have each PE turn on or off
depending on if/loop status and you had a very powerful programming
model. And after about 100 hours with it, it actually was a pretty
easy model. I converted a whole genetic algorithms suite over to the
MasPar in about 100 hours of work...

Mark
 
Andy \"Krazy\" Glew...
Posted: Mon Oct 12, 2009 1:22 am
Guest
Grr. Posting problems.

Mark Brehob wrote:
Quote:
[original post]:
Back in the day ('94?) I did a fair bit of work on the MasPar. My
plan was to do my PhD on massive SIMD machines. ...

... I have found a copy of the MPL programming guide. ...

[in a subsequent post]: I'm not much up on the current state of the
GPGPU tools, but my actual
thought is to try to get them to understand a programming/hardware
model that was designed for general SIMD work rather than one that was
hacked for it. Put differently, the MasPar model is more general and
frankly a lot cleaner. I'd like them to learn it and then hopefully
consider how to either change the hardware or software of the GPU to
make that programming model viable. Perhaps the latest round of tools
has gotten us there already. They hadn't a year or so ago.

Or, even better, have the GPU replaced with something more MasPar-
like. Power likely prevents that in the short term, but... It still
makes a potentially interesting class project...


Mark:

Ever since I realized that the Nvidia SIMT (Single Instruction Multiple
Threading) model is not just massive SIMD, but is something I have not
seen before, I have wondered where it came from.

It is probably not specific to Nvidia, since it cropped up, in slightly
different flavors, in all the GPUs at about the same time (2003?):
Nvidia's SIMT(scalar), ATI's SIMT(VLIW), Intel's integrated graphics.
(Because it cropped up in so many different flavors, and because it is
obviously not just S-single, I've been trying out names such as NIMT (N
instructions, M threads) or, my current preference, CT (Coherent Threading).

Because it cropped up in so many places at around the same time, it
seems likely that it was invented at some earlier company, that failed,
and whose refugees brought it to the GPU community. MasPar seems like a
likely candidate, but I have not seen any good evidence. The published
papers I have seen on MasPar seem more primitive than GPU SIMT, but who
knows what was unpublished.

I must admit that, when MasPar came out, I was one of those who said
"Massive SIMD, ho-hum, boring, I've seen it before." But if MasPar
truly is where SIMT/CT arose, well, I want to give credit where credit
is due.

And if MasPar was more advanced and general purpose than a reasonable
extrapolation of the GPU programming model, well, I'd love to see that too.

I'd love to read a copy of the MPL programming guide, if you are allowed
to share it.

Is there anything you are allowed to share?
 
Andy \"Krazy\" Glew...
Posted: Mon Oct 12, 2009 2:25 am
Guest
Andy "Krazy" Glew wrote:
Quote:
I must admit that, when MasPar came out, I was one of those who said
"Massive SIMD, ho-hum, boring, I've seen it before." But if MasPar
truly is where SIMT/CT arose, well, I want to give credit where credit
is due.

I am afraid that spending some time googling MasPar this afternoon has
not changed my mind: what I can find seems to indicate that MasPar was a
fairly uninspiring SIMD machine, rather like the MPP, or the Thinking
Machines TM-1.

This does not answer the question "Where did SIMT come from?"
 
Eugene Miya...
Posted: Fri Oct 30, 2009 9:35 pm
Guest
In article <8087b0d0-6936-4f72-8ba1-f209cd7f9aa2 at (no spam) v25g2000yqk.googlegroups.com>,
Mark Brehob <brehob at (no spam) gmail.com> wrote:
Quote:
Hello all,
Back in the day ('94?) I did a fair bit of work on the MasPar. My
plan was to do my PhD on massive SIMD machines. Well, parallel
computer systems went out of vogue and it looked like getting work on
that published would be nearly impossible. So I jumped over to memory
systems.

In any case, I'm wondering if anyone has a copy of the MasPar
compliers (MPL, MasPar Fortran, etc.) and simulator. I have found a
copy of the MPL programming guide. But all links I could find to
compilers were dead.

A bunch of students are going to be picking parallel computer projects
for a parallel architecture class and I'd love to get some of them to
revisit the massive SIMD arena. I have a dream of getting students to
actually design (and maybe get built) a massive SIMD chip...

Of course, if anyone knows of better massive SIMD compliers/simulators
that would be great too!

(I've also posted to comp.parallel but later realized the moderator is
getting spammed to death and won't be moderating posts for a while so
I thought I'd post here too...).

The moderator is back from visiting Maryland.
Most of the spam blow back is being contained at the moment.

The Museum (CHM) has a couple, real hardware, and Jeff Kalb can
occasionally still be seen driving around Santa Clara Valley. Tom Blank
I know is up in Redmond on the Microsoft campus. Unfortunately the
remains of Maspar tossed their last systems literally by only a couple
of weeks before I could get them to CHM. The problem is that Jim
Fischer at GSFC has 6 filing cabinets of files which we think include
manuals still in Greenbelt (not where I was visiting).
One other problem is that some one needs to figure out a front end.
I think Jim used VMS VAXstations, not Ultrix nor SUN (the MPP used a VMS VAX).

Ideally this should be contained before I take vacation (holiday) in
December).
 
Eugene Miya...
Posted: Fri Oct 30, 2009 9:49 pm
Guest
In article <4AD25B5F.4050901 at (no spam) patten-glew.net>,
Andy \"Krazy\" Glew <ag-news at (no spam) patten-glew.net> wrote:
Quote:
Andy "Krazy" Glew wrote:
I must admit that, when MasPar came out, I was one of those who said
"Massive SIMD, ho-hum, boring, I've seen it before." But if MasPar
truly is where SIMT/CT arose, well, I want to give credit where credit
is due.
You use one?


Quote:
I am afraid that spending some time googling MasPar this afternoon has
not changed my mind: what I can find seems to indicate that MasPar was a
fairly uninspiring SIMD machine, rather like the MPP, or the Thinking
Machines TM-1.

That's CM-1. I hosted Danny on his first West Coast tour.

The people who thought highly of the CM-1 were the AI types who also
liked Symbolics 3600s. I also saw and have pieces of the MPP (now at
the Smithsonian near Dulles). The AI types remain largely clueless to
parallelism. They don't constitute a viable market.

The real ho-hum part wasn't the speed. The problem for real machines
with real problems was that they lacked sufficient amounts of real memory.

Maspar, for the 3-4 times I went over there (just S of our South gate),
tried a first order approximation to a conservative basic mesh architecture.
It's reinventing the ILLIAC IV again. Still it was braver than anything
tried in IBM, Univac, and a slew of other firms. Braver than Intel?
Harder to say.

Quote:
This does not answer the question "Where did SIMT come from?"


%A Jie Tao
%A Martin Schulz
%A Wolfgang Karl
%T SIMT/OMP: A Toolset to Study and Exploit Memory Locality of
OpenMP Applications on NUMA Architectures
%B Shared Memory Parallel Programming with OpenMP,
5th International Workshop on OpenMP Applications and Tools,
(5th WOMPAT'04)
%E Barbara M. Chapman
%S Lecture Notes in Computer Science (LNCS)
%V 3349
%I Springer-Verlag (New York/Berlin)
%C Houston, TX, USA
%D May 2004, Revised Selected Papers 2005
%P 41-52

That is the only entry in my biblio (even behind the times).


See you in 3 weeks.
 
Eugene Miya...
Posted: Fri Oct 30, 2009 9:53 pm
Guest
In article <835a671f-0c6e-4508-9045-a78f1d7b2002 at (no spam) l2g2000yqd.googlegroups.com>,
Mark Brehob <brehob at (no spam) gmail.com> wrote:
Quote:
I'm not real familiar with the SIMT programming model, but from what
I've seen it sounds a lot like the old SPMD (P=3DProgram) that the
MasPar used. You wrote the program as a single program with each data

Maspar didn't use SPMD. SPMD was found in architectures like hypercubes
which used commodity processors like Intels, and was so coined by
Frederica Darema (then at TJ Watson IBM, and last at NSF [didn't see her
when I was there 2 weeks ago]). Each node had full copies of message
passing programs which had to keep only local consistency.
 
Mayan Moudgill...
Posted: Sun Nov 01, 2009 4:54 am
Guest
Eugene Miya wrote:
Quote:
The AI types remain largely clueless to
parallelism.

Does that explain, or is a consequence of, the fate of the 5th gen fiasco?
 
Paul Wallich...
Posted: Mon Nov 02, 2009 12:37 am
Guest
Mayan Moudgill wrote:
Quote:
Eugene Miya wrote:
The AI types remain largely clueless to
parallelism.

Does that explain, or is a consequence of, the fate of the 5th gen fiasco?

A little of both (and there are arguments for and against calling the
"fifth generation" school of stuff a fiasco, but that's neither here nor
there). It's pretty clear in retrospect that the AI people did not fully
understand (ahem) either the height that the memory wall would reach or
the durability of Moore's Law. Which led in turn to misapprehensions
about the cost of interprocessor communication and processor/job
scheduling and the cost/benefit ratio of interesting hardware. They
spent a lot of time and money trying to be smart at a time when advances
in brute force were on the fast-rising part of the curve.

And now, of course, everybody has more CPU and memory in their pocket
than a Fifth-generation researcher could have dreamed of, and many of
their algorithms are working just fine on uniprocessors.

paul
 
Robert Myers...
Posted: Mon Nov 02, 2009 12:55 am
Guest
On Oct 30, 12:49 pm, eug... at (no spam) cse.ucsc.edu (Eugene Miya) wrote:

Quote:
The people who thought highly of the CM-1 were the AI types who also
liked Symbolics 3600s.  I also saw and have pieces of the MPP (now at
the Smithsonian near Dulles). The AI types remain largely clueless to
parallelism.  They don't constitute a viable market.

The real ho-hum part wasn't the speed. The problem for real machines
with real problems was that they lacked sufficient amounts of real memory..

That's an interesting claim. It implies that all you have to do is to
build a knock-off of CM-1, give it sufficient memory, and people would
no longer regard Thinking Machines as the exercise in hubris that they
now do. I think of Thinking Machines as a major contributor to moving
computing out of Kendall Square forever.

I read Danny Hillis' PhD thesis after conversations with you. I don't
remember much of it because I'm pretty sure I missed the really,
really smart part of it. Mostly, it seemed really, really obvious.
Perhaps I'm just not really, really smart enough myself.

In any case, you have offered one of your as-always tantalizing
claims. Is there any substantiating evidence, or are you just
repeating what the really, really smart people were saying at the
time?

Probably, I'll do better just to go to AI seminars at MIT and see what
I can find out for myself. I'm sure many of the players are still
around.

Robert.
 
Mayan Moudgill...
Posted: Mon Nov 02, 2009 1:18 am
Guest
Paul Wallich wrote:


Quote:
A little of both (and there are arguments for and against calling the
"fifth generation" school of stuff a fiasco, but that's neither here nor
there).

I'd be interested to hear the arguments against calling it a fiasco.
Even the most obvious one - it gave a big boost to Japanese computer
science/industry - seemed to dissapate quickly after MITI et.al. turned
the funding tap off.
 
Robert Myers...
Posted: Mon Nov 02, 2009 4:16 am
Guest
On Nov 1, 10:07 pm, Joe Pfeiffer <pfeif... at (no spam) cs.nmsu.edu> wrote:

Quote:
Third, this is the first time I've ever seen the CM-1 described as an
exercise in hubris.

Perhaps the fact that DARPA had to create a market for the hardware by
forcing it on contractors didn't leave the same impression with you
that it did with me--and apparently with lots of other people.

http://en.wikipedia.org/wiki/Thinking_Machines

<quote>

Thinking Machines became profitable in 1989 thanks to its DARPA
contracts,[citation needed] and in 1990 the company had $65 million
(USD) in revenue, making it the market leader in parallel
supercomputers. In 1991, DARPA reduced its purchases amid criticism it
was unfairly subsidizing Thinking Machines at the expense of other
vendors like Cray, IBM, and in particular, NCUBE and MasPar. By 1992
the company was losing money again, due to lack of business; CEO
Sheryl Handler was forced out in the face of public criticism.

</quote>

If no one has ever called it an exercise in hubris, they should have.

Quote:
I read Danny Hillis' PhD thesis after conversations with you.  I don't
remember much of it because I'm pretty sure I missed the really,
really smart part of it.  Mostly, it seemed really, really obvious.
Perhaps I'm just not really, really smart enough myself.

I was involved in the design of the UW Pyramid Machine (which nobody has
ever heard of....) and I had a very, very different reaction to yours.
The whole thing struck me as incredibly ingenious.

It wouldn't be the first time I was slow on the uptake.

I don't know what purpose an off-handed comment about CM-1 serves. If
there is a technical lesson to be learned, let's hear it. This is the
first I've heard that *anyone* (aside from the DARPA sponsor) liked
the Connection Machine. If it was useful for AI, there's probably a
lesson to be learned and I'd like to learn it. As I alluded to, I
don't have to waste the time of comp.arch if it's of interest to no
one but me.

Robert.
 
 
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